IRFP054V. HEXFET Power MOSFET V DSS = 60V. R DS(on) = 9.0mΩ I D = 93Aˆ. Absolute Maximum Ratings. Thermal Resistance PD

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1 l Advanced Process Technology l Ultra Low OnResistance l Dynamic dv/dt Rating l 75 C Operating Temperature l Fast Switching l Fully Avalanche Rated l Optimized for SMPS Applications Description Advanced HEXFET Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO247 package is preferred for commercialindustrial applications where higher power levels preclude the use of TO220 devices. The TO247 is similar but superior to the earlier TO28 package because of its isolated mounting hole. G IRFP054V HEXFET Power MOSFET D S V DSS = 60V R DS(on) = 9.0mΩ I D = 93Aˆ TO247AC PD 94 Absolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain V 93ˆ I T C = C Continuous Drain V 66 A I DM Pulsed Drain Current 360 P C = 25 C Power Dissipation 80 W Linear Derating Factor.2 W/ C GatetoSource Voltage ± 20 V I AR Avalanche Current 90 A E AR Repetitive Avalanche Energy 8 mj dv/dt Peak Diode Recovery dv/dt ƒ 4.7 V/ns T J Operating Junction and 55 to 75 T STG Thermal Resistance Storage Temperature Range Soldering Temperature, for seconds 300 (.6mm from case ) Mounting torque, 632 or M3 srew lbf in (.N m) Parameter Typ. Max. Units R θjc JunctiontoCase 0.85 R θcs CasetoSink, Flat, Greased Surface 0.24 C/W R θja JunctiontoAmbient 40 C 3/30/0

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 60 V = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient V/ C Reference to 25 C, I D = ma R DS(on) Static DraintoSource OnResistance 9.0 mω = V, I D = 54A (th) Gate Threshold Voltage V V DS =, I D = 250µA g fs Forward Transconductance 6 S V DS = 25V, I D = 54A I DSS DraintoSource Leakage Current 25 V µa DS = 60V, = 0V 250 V DS = 48V, = 0V, T J = 50 C I GSS GatetoSource Forward Leakage = 20V na GatetoSource Reverse Leakage = 20V Q g Total Gate Charge 70 I D = 64A Q gs GatetoSource Charge 39 nc V DS = 48V Q gd GatetoDrain ("Miller") Charge 59 = V, See Fig. 6 and 3 t d(on) TurnOn Delay Time 22 V DD = 30V t r Rise Time 60 I D = 64A ns t d(off) TurnOff Delay Time 77 R G = 6.2Ω t f Fall Time = V, See Fig. Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 4080 = 0V C oss Output Capacitance 840 V DS = 25V C rss Reverse Transfer Capacitance 80 pf ƒ =.0MHz, See Fig. 5 E AS Single Pulse Avalanche Energy mj I AS = 90A, L = 54µH SourceDrain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 93ˆ (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 360 (Body Diode) pn junction diode. S V SD Diode Forward Voltage.2 V T J = 25 C, I S = 90A, = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 64A Q rr Reverse Recovery Charge nc di/dt = A/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. ) Starting T J = 25 C, L = 54µH R G = 25Ω, I AS = 90A, =V (See Figure 2) ƒ I SD 90A, di/dt 250A/µs, V DD V (BR)DSS, T J 75 C Pulse width 400µs; duty cycle 2%. This is a typical value at device destruction and represents operation outside rated limits. This is a calculated value limited to T J = 75 C. This is tested with same test conditions as the existing data sheet ˆ Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 90A. 2 D S

3 I D, DraintoSource Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintoSource Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C 0. V DS, DraintoSource Voltage (V) 20µs PULSE WIDTH T J = 75 C 0. V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintoSource Current (A) 0 T = 75 J C T J = 25 C V DS= 25V 20µs PULSE WIDTH , GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 2.5 I D = 70A = V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature 3

4 I D, DraintoSource Current (A) IRFP054V C, Capacitance (pf) 7000 VGS = 0V, f = MHz Ciss = Cgs Cgd, C ds SHORTED 6000 Crss = Cgd Coss = Cds Cgd 5000 C iss C oss 0 C rss 0 V DS, DraintoSource Voltage (V), GatetoSource Voltage (V) I = D 64A V DS = 48V V DS = 30V V DS = 2V FOR TEST CIRCUIT SEE FIGURE Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage I SD, Reverse Drain Current (A) 0 T J = 75 C T J = 25 C = 0 V V SD,SourcetoDrain Voltage (V) 0 Tc = 25 C Tj = 75 C Single Pulse OPERATION IN THIS AREA LIMITED BY R DS (on) µsec msec msec 0 V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 LIMITED BY PACKAGE V DS R D I D, Drain Current (A) T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature V DS 90% R G Pulse Width µs Duty Factor 0. % D.U.T. Fig a. Switching Time Test Circuit % t d(on) t r t d(off) t f Fig b. Switching Time Waveforms V DD Thermal Response (Z thjc ) 0. D = SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase 5

6 R G V DS 20V tp L D.U.T IAS 0.0Ω Fig 2a. Unclamped Inductive Test Circuit tp 5V DRIVER V DD A V (BR)DSS E AS, Single Pulse Avalanche Energy (mj) TOP BOTTOM I D 37A 64A 90A Starting T, Junction Temperature ( J C) Fig 2c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF Q GS Q GD D.U.T. V DS V G 3mA Charge Fig 3a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 3b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T* ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD * Reverse Polarity of D.U.T for PChannel Driver Gate Drive Period P.W. D = P.W. Period [ =V ] *** D.U.T. I SD Waveform Reverse Recovery Current ReApplied Voltage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Ripple 5% Forward Drop [ V DD ] [ ] I SD *** = 5.0V for Logic Level and 3V Drive Devices Fig 4. For Nchannel HEXFET power MOSFETs 7

8 TO247AC Package Outline Dimensions are shown in millimeters (inches) 5.90 (.626) 5.30 (.602) B A 3.65 (.43) 3.55 (.40) 0.25 (.0) M 5.50 (.27) D B M D 5.30 (.209) 4.70 (.85) 2.50 (.089).50 (.059) (.800) 9.70 (.775) 4.80 (.583) 4.20 (.559) 2 3 2X C 4.30 (.70) 3.70 (.45) 5.50 (.27) 4.50 (.77) NOTES: DIMENSIONING & TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO247AC (.094) 2.00 (.079) 2X 5.45 (.25) 2X.40 (.056) 3X.00 (.039) 0.25 (.0) M C A S 3.40 (.33) 3.00 (.8) 3X 0.80 (.03) 0.40 (.06) 2.60 (.2) 2.20 (.087) LEAD ASSIGNMENTS GATE 2 DRAIN 3 SOURCE 4 DRAIN TO247AC Part Marking Information EXAMPLE : THIS IS AN IRFPE30 W ITH ASSEMBLY LOT CODE 3AQ INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFPE30 3AQ 9302 A PART NUMBER DATE CODE (YYWW ) YY = YEAR WW WEEK Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q] market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information. 3/0 8

9 Note: For the most current drawings please refer to the IR website at: